Direct conversion RF receivers, or more simply direct conversion receivers (DCRs), have been found to be attractive for use in mass produced consumer communication products such as cellular telephones and personal communicators. This is due to the fact that the DCR has a relatively simple structure (as compared to the conventional heterodyne or superheterodyne type of receiver), a reduced component count, and enables a high level of circuit integration to be achieved. The DCR is so-named because the received RF frequency is down-mixed or down-converted directly to a DC baseband signal, or to a very low frequency baseband signal, without undergoing one or more stages of intermediate frequency (IF) down-mixing.
FIG. 1 is a simplified schematic diagram that illustrates a prior art example of a DCR 1 used for receiving a modulated RF input signal and downconverting it to in-phase (I) and quadrature (Q) baseband signals. The DCR 1 includes an input RF passband filter 2, a low noise amplifier (LNA) 3 and I and Q channels or branches each containing a down-conversion mixer 4, a low pass filter (LPF) 5, an automatic gain control (AGC) block 6, a second LPF 7 and an analog to digital converter (ADC) 8. The mixing frequency input to the I and Q mixers is supplied by a local oscillator (LO) 9 containing a phase locked loop (PLL) 9A, a voltage controlled oscillator (VCO) 9B, a buffer amplifier 9C and possibly a divider 9D. The divider 9D may also conveniently provide the desired ninety degree phase shift between the LO signals input to the I and Q branch mixers 4. The LO signal is typically equal to (or very near to) the center frequency of the RF input signal (note that the instantaneous frequency of the RF input signal can differ from the LO frequency due to modulation).
It is important to low pass filter the down-converted signal as soon as possible after the mixers 4, otherwise the signal will exhibit linearity and compression-related problems upon further amplification. This is due to adjacent channel signal that may be at a higher level than the desired channel (own channel) signal. The use of low pass filtering serves to attenuate the adjacent channel signals, thereby allowing for additional amplification of the own channel signal. This type of operation is typically referred to in the art as channel filtering.
FIG. 2A is a simplified schematic diagram of a prior art embodiment of the mixer 4 and first LPF 5 of FIG. 1 (a Gilbert Cell mixer). For the purposes of this discussion it does not matter whether the I branch or the Q branch circuitry is illustrated. Note that differential signals and circuitry are illustrated and are assumed to be used. The differential RF input signal from the LNA 3 is applied to a pair of transconductors 4A and 4B. The outputs of transconductors 4A and 4B are coupled to a switch pair (SW1, SW2) that also receives the LO signal. Common mode DC and input signal dependent differential currents, produced by the transconductors 4A and 4B, are alternated to the output loads according to the LO signal, thereby causing downconversion. The currents are converted to voltages in resistors R1 and R3 (R1 is typically equal to R3). However, conversion results at a high frequency are attenuated in the low pass filter formed by R1, R3 and C1 (LPF 5). The output is connected to the next stage, shown as the AGC block 6 in FIG. 1.
In the illustrated prior art design for the LPF 5 the low pass corner frequency is given by 1/(2π(2(R1*C1)), assuming that R1=R3. However, the ohmic value of R1 and R3 cannot be made large as an undesirable large DC voltage drop will result. This is true because R1 and R3 are in series with the mixer 4 and the DC power supply, and the mixer DC current (IDC) flows through R1 and R3. The conventional solution instead increases the value of C1. This solution, however, creates a problem when it is desired to fabricate the DCR in an integrated circuit form, as the required large value of capacitance for C1 correspondingly requires a substantial amount of integrated circuit area to implement. An alternative solution is to make C1 an external discrete component, but this approach requires that additional integrated circuit pins be provided, and thus adds cost, increases fabrication/testing complexity, and introduces a possible interference source and imbalance due to pin-related parasitics.
FIG. 2B shows a conventional Low Pass Filter (LPF) 5′ constructed using an active component, i.e., an operational amplifier (op amp), while FIG. 2C shows the roll-off in gain as a function of frequency. Note that the input (voltage mode) is applied through R1 and R3.
Reference may be had to a publication entitled: “A 1.5 GHz Highly Linear CMOS down conversion mixer”, IEEE Journal of Solid State Circuits, J. Crols et al., Vol. 30, No. 7, July 1995. This publication describes a CMOS mixer topology that uses two additional capacitors added to the conventional CMOS lowpass filter structure, enabling GHZ signals to be processed while using a low frequency operational amplifier (op amp) as an output amplifier.
Reference can also be made to B. Song, “CMOS RF Circuits for Data Communications Applications”, IEEE Journal of Solid-State Circuits, Vol. SC-21, No.: 2, April 1986, pps. 310–317, for showing a triode low pass mixer.